3U/6U VPX Mass Storage

3U-AD-1010 Data acquisition card

3U-AD-1010 Data acquisition card
  • Lane 1 10-bit10GSPSADC
  • Built-in 100MHz low-vibration Clock, connect external clock and relevant sources by MMCX, Lane 1 clock supply stimulation and synchronization function by connecting MMCX.
  • Self-programming XilinxVirtex6LX195T/SX475TFPGA
  • 2M36QDRII+SRAM storage 350MHz
  • 3UVPXformfactor
  • OpenVPX Structure
  • single-channel 10-bit10Gsps ADC
  • AC or DC input coupling
  • 100MHz Built-in low-vibration Clock to generate and distribute
  • External relevant clock input
  • 15psTDC external stimulation input
  • Independent calibration function
  • XilinxVirtex@6LX195T/LX240T/SX315T/SX474TFPGA
  • 2M36350MHzQDRII+SRAM
  • 1GbitBPIFLASH AES encryption
  • RTM monitor and detect microcontroller by Ethernet of connection USB2.0 and 10/100.
  • Convection cooling and conduction cooling versions
  • Windows7 and Linux drivers
  • Development kit Including FPGA core and Infrastructure design.

Production Introduction:

Lane 1 10-bit10GSPSADC
Built-in 100MHz low-vibration Clock, connect external clock and relevant sources by MMCX, Lane 1 clock supply stimulation and synchronization function by connecting MMCX.
Self-programming XilinxVirtex6LX195T/SX475TFPGA
2M36QDRII+SRAM storage 350MHz

Production Diagram:

     \

 

spec   Index
Tech details     Lane 1 10-bit10GSPSADC
    Built-in 100MHz low-vibration Clock, connect external clock and relevant sources by MMCX, Lane 1 clock supply stimulation and synchronization function by connecting MMCX.
    Self-programming XilinxVirtex6LX195T/SX475TFPGA
    2M36QDRII+SRAM storage 350MHz